AI for a greener, safer world
Architecture exploration of AI-enabled SoCs
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Meet Deneb...

Deneb is an architecture modeling and exploration tool for AI-enabled system-on-chip (SoC) products. Deneb takes the guess work out of SoC architecture design and makes accurate assessment of its performance, power, cost and safety through simulation. Deneb helps chip architects to make evidence-based design and IP-selection choices.

Feature Highlights

Featured capability

AI compute pipeline efficiency analysis and sizing

Deneb simulates the compute pipeline of an AI accelerator core while it is executing target ML-model, and analyzes its throughput, latency and memory bandwidth usage. Deneb optimizes AI accelerator performance by properly sizing the different components of the AI compute pipeline that may consists of tensor, vector and scalar processing units

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Deneb architecture blocks

Deneb includes a rich library of cycle-approximate and cycle-accurate architecture models of IPs that comprise a typical AI SoC: CPU, memory subsystem, network-on-cip(NOC), tensor and vector processing units, GPU, image pre-processing unit (ISP), display, PCI etc,. all are parameterized and fully configurable

Deneb Workload decomposition

Deneb includes utilities to decompose various ML and or non-ML algorithmic workloads (e.g. convolutional neural net modes, transformers, GenAI and LLMs) into task graphs for task-driven HW/SW co-simulation. Deneb also includes a set of prebuild and user configruable task mapper and schedulers to simulate task dispatching

Performance analysis and tuning

Deneb produces analytical reports to show the efficacy of an architecture, performs hardware parameter to sweeping and analyze sensitivity regions of the configuration space. Deneb also identifies potential risk areas concerning information or functional safety

Recent News

June 29, 2024

Deneb Design launches on-device AI and computer vision training summer camp in Sunnyvale, CA.

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